In the prior art, during the manufacturing procedure of array of a liquid crystal display panel, the gate drive circuit is generally formed on the array substrate through Gate Driver On Array (GOA) technology, so that the gate lines can be driven in a row-by-row scanning mode. Through the GOA technology, the bonding procedure of external Integrated Circuit (IC) can be saved, and the integration level of the liquid crystal display panel can be improved.
Since the emerging of Low Temperature Poly-Silicon (LTPS), the designing of Integrated Circuits on the peripheral region of the display panel has become a focus in the industry due to the super-high mobility ratio of the carriers of LTPS semiconductor. The types of Thin Film Transistor (TFT) can be regulated by LTPS through ion arrangement technology, and thus the GOA circuit can be configured to be N-type Metal Oxide Semiconductor (NMOS), P-type Metal Oxide Semiconductor (PMOS), or Complementary Metal Oxide Semiconductor (CMOS). However, with respect to the costs of the photomask, CMOS and NMOS need more manufacturing procedures compared with PMOS, so that the manufacturing costs of CMOS and NMOS would increase to a large extent. Moreover, the CMOS type circuit structure is complex, and it is hard to realize an ultra-narrow frame design. In particular, with respect to small sized display devices (such as mobile phone screens), the size of the frame is especially important to obtain a better user experience.
In addition, the power consumption of the GOA circuit is an important reference index of the performance of the display device. The structure of the LTPS GOA drive circuit in the prior art is complex, and the power consumption thereof is high.